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Verification of control-data plane consistency in software defined network
ZHU Mengdi, SHU Yong’an
Journal of Computer Applications    2020, 40 (6): 1751-1754.   DOI: 10.11772/j.issn.1001-9081.2019101712
Abstract325)      PDF (497KB)(425)       Save
Aiming at the problem of inconsistency between the network policies of control layer and flow rules of data layer in Software Defined Network (SDN), a detection model for Verifying control-data plane Consistency (VeriC) was proposed. Firstly, the function of the packet processing subsystem was realized through the VeriC pipeline on the switch, and the function is sampling the data packet, and updating the tag field in the sampled data packet when the packet passing through the switch. Then, after the update was completed, the tag values were sent to the server and stored in the real tag value group. Finally, the real tag value group and the stored correct tag value group were sent to the verification subsystem to perform the consistency verification. As it failed, the two groups of tag values were sent to the localization subsystem to locate the switch with flow table entry error. A fat tree topology with 4 Pod was generated by ns-3 simulator, where the accuracies of consistency detection and faulty machine location of VeriC are higher than those of VeriDP, and the overall performance of VeriC is higher than that of 2MVeri model. Theoretical analysis and simulation results show that VeriC detection model can not only perform consistency detection and accurately locate the faulty switch, but also take shorter time to locate the faulty switch compared to other comparison detection models.
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